A semiconductor wafer or substrate can be made with a variety of base substrate materials, such as silicon (Si), germanium, aluminum phosphide, aluminum arsenide, gallium arsenide (GaAs), gallium nitride (GaN), aluminum gallium nitride over gallium nitride (AlGaN/GaN), indium phosphide, silicon carbide (SiC), or other bulk material for structural support. A plurality of semiconductor die is formed on the wafer separated by a non-active, inter-die substrate area or saw street. The saw street provides cutting areas to singulate the semiconductor wafer into individual semiconductor die.
In a vertical semiconductor device, the primary current path is vertical from the top surface of the die to a back surface of the die. The vertical resistance, e.g., drain-source resistance (RDSON) of a vertical transistor, decreases with the thickness of the semiconductor die. To minimize vertical resistance, the semiconductor die should be as thin as possible while still maintaining structural integrity. An opening can be formed in the back surface to reduce thickness of the semiconductor die and vertical resistance. A thick metal layer, such as 25 micrometers (μm) copper, is formed across the back surface and into the opening for structural support and electrical interconnect. Unfortunately, cutting through the thick metal layer within the saw street to separate the semiconductor die can be difficult and impose premature wear and excessive cutting debris on the saw blade.